Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Microchip Technology/ATSAME51J19A/EIC/CTRLA#0x0
CKSEL=CLK_GCLK
Control A
Software Reset
Enable
Clock Selection
0 (CLK_GCLK): Clocked by GCLK
1 (CLK_ULP32K): Clocked by ULP32K
https://github.com/cmsis-svd/cmsis-svd-data